hardware device used for asynchronous serial communication in which the data format and transmission speeds are configurable.
It’s one of the most common ways for micro controllers and computers to communicate with other devices.
Key Features
- Asynchronous communication - no shared clock signal between devices
- meaning that receiver must know the Baud Rate prior to transmission.
- Two data lines: TX (transmit) and RX (receive)
- Converting parallel data to serial format and vice versa
- Configurable Baud Rates
- Data framing with start/stop bits and optional parity
- Use Full Duplex Communication or Half Duplex Communication
Data Frame
A standard UART data frame consists of:
Start bit
Always a logic low (0) that indicates the beginning of a new data byte. This transition from the idle state (logic high) to low alerts the receiver that data is coming.
Data bits
Typically 5 to 9 bits (commonly 8 bits) that represent the actual data being sent. These are transmitted least significant bit (LSB) first by default.
Parity bit (optional)
Used for basic error detection.
Can be:
- Even parity: The number of 1s in the data plus the parity bit must be even
- Odd parity: The number of 1s in the data plus the parity bit must be odd
- None: No parity bit is included
Stop bit(s)
Always logic high (1) that signals the end of the data byte. Can be 1, 1.5, or 2 bits long.
This creates a guaranteed idle period before the next start bit.
Examples
UART Data Frame of ASCII letter ‘A’
Sending ‘A’ (01000001) with 8 data bits, no parity, and 1 stop bit
Idle → Start → LSB MSB → Stop → Idle
1 0 1 0 0 0 0 0 1 0 1 1