Mechanism to detect bit errors, by the following procedure: - The sender performs 1s complement of the sum of all the 16-bit words in the segment with overflow being wrapped around and the result is put in the checksum field. - At the receiving side all the 16-bit words are added, including the checksum which will result in all 1’s if there are no errors.
Examples
Suppose that a sender has the following three 16-bit words:
The sum of the first two of these 16-bit words is
Adding the third word to the above sum gives
where overflow was wrapped around.
The 1s complement is obtained by converting all the 0s to 1s and converting all the 1s to 0s. Thus, the 1s complement of the sum 0100101011000010 is 1011010100111101, which becomes the checksum.
At the receiver, all the words are added. If no bit-errors have occurred then this sum should be the same as we just calculated for the sender. Adding this sum (which is 1s complement of the checksum) to the checksum
clearly must be all 1’s. Thus we know that if the result is not all 1’s, then the sum of the words is different at the receiver than it was at the sender, which must mean that a bit-error has occurred.